Monday, January 28, 2013

Papilio Pro + RetroCade LCD display

I've been working my way through Mike Field's free ebook "Introducing the Spartan 3E FPGA and VHDL" mentioned on Gadget Factory's wiki page for the LogicStart MegaWing after a flurry of purchases of boards for learning about FPGA's. I've been using Xilinx's ISE Design Suite 14.4 (part of their Vivado Design Suite) to synthesise and implement the design and Gadget Factory's Papilio Loader to load the resulting .bit file into the Spartan 6 FPGA.

In my newbie ignorance I ordered the LogicStart as well as the RetroCade peripheral boards and although Mike's ebook is very good, I've now got to the stage where I want to branch out a bit to see if I have learned enough of FPGA basics to be reasonably independent.

The RetroCade has a 2x16 LCD display on it so I thought I'd like to write a program to use it to display some text. Initially I found VHDL examples which drive the display directly but it occurred to me that the display was never meant to be the only thing controlled by the FPGA. Dedicating a Spartan6 FPGA just to drive the display seemed wasteful in the extreme. So I looked a bit further and found Xilinx's s3e-starterkit mentioned here (clicking the download link pops up a required but free registration form).

The idea was to re-write the code for the s3 to use the s6 used in the Papilio Pro and to change the constraints file to use the pins and display on the RetroCade rather than those on the s3 starter kit board.

The starterkit code for the s3 adds a PicoBlaze 8-bit micro-controller to the design which uses less than 5% of the available circuitry. An updated version of the PicoBlaze for the s6 uses even less circuitry.

It's a fairly convoluted path to write such an FPGA application. As well as the usual VHDL file to define the actual application at top-level (pprolcd.vhd), there is also a standard processor VHDL file (kcpsm6.vhd) supplied by Xilink which defines the micro-controller in the FPGA circuitry. Then the micro has to be programmed like any standard micro, so there is an assembler (kcpsm6.exe) to translate a standard assembly program (control.psm) into a VHDL file (control.vhd) to define a block of ROM which contains the program instructions. Finally, there is a constraints.ucf file which holds the FPGA pin definitions which correspond to the RetroCade display pins.

Files are available here.

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